The phrase semiconductor supply chain suggests a line running from raw material to finished product. The reality is closer to a loop crossing several continents repeatedly, with a handful of steps that only one or two companies in the world can perform. Understanding where those chokepoints actually sit is the difference between industrial policy that helps and industrial policy that funds the wrong stage.
Design, manufacture, package, test
Most advanced chips today are designed by companies that own no factories. They license instruction set architectures, use electronic design automation software from a very small number of vendors, and send the resulting design to a contract manufacturer. That separation of design from fabrication is the single most important structural fact about the industry, because it means design leadership and manufacturing leadership can sit in different countries.
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Fabrication itself is extraordinarily concentrated at the leading edge. Building a facility capable of producing the smallest current process nodes costs well over ten billion dollars and requires a workforce with tacit knowledge that takes years to accumulate. Behind fabrication sits an equipment industry that is even more concentrated: extreme ultraviolet lithography systems, essential for the most advanced nodes, are produced by a single company.
After the wafer is complete, chips are cut, packaged and tested — steps historically treated as low-value and outsourced to Southeast Asia, and now recognised as strategically important because advanced packaging that stacks multiple dies together has become a primary route to performance gains as transistor scaling slows.
Where the real chokepoints are
Policy conversations focus on wafer fabrication because it is visible and capital-intensive, but the narrowest points are elsewhere: lithography equipment, photoresist chemistry, high-purity specialty gases, certain substrate materials and the design software itself. Several of these are supplied by a small number of firms in a small number of countries, and substitution is measured in years of qualification work rather than months of procurement. Detailed mapping of these dependencies has been published by the U.S. Department of Commerce as part of its semiconductor programme.
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Export controls have made this structure geopolitically live. Restrictions on advanced computing chips and on the equipment used to make them are administered through the Bureau of Industry and Security, and because the controls follow technology rather than geography, they reach any manufacturer using controlled American tools regardless of location.
The economics of a fab
A leading-edge fab is a machine for converting enormous fixed cost into marginal cost near zero, which means utilisation is everything. A facility running at ninety percent is highly profitable; the same facility at sixty percent loses money. That sensitivity produces the industry’s notorious cycle: shortages prompt capacity announcements, capacity arrives two to three years later, often into softer demand, and prices collapse until demand catches up. Sales data compiled by the Semiconductor Industry Association shows the pattern repeating across five decades.
Government subsidy programmes in the United States, Europe, Japan, Korea and China have added a new variable by decoupling investment decisions partly from that cycle. The risk is synchronised overbuilding; the intended benefit is geographic redundancy in a supply chain whose fragility was demonstrated during the pandemic.
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What resilience actually requires
Redundancy at one stage is worthless if the following stage remains single-sourced. A domestic fab that depends on imported photoresist, imported packaging and a single equipment supplier has moved the risk rather than removed it. The more useful frame is to ask, for each step, how long qualification of an alternative supplier would take and whether any alternative exists at all. On that test the industry has made real progress in fabrication capacity and very little in materials and equipment — which is where the next decade of policy argument is likely to concentrate.
Where the chokepoints actually are
Public discussion treats chip supply as a fabrication problem, but the genuine single points of failure sit further upstream and further downstream than most coverage suggests. Extreme ultraviolet lithography has one supplier worldwide. Several specialty chemicals, photoresists and high-purity gases have two or three. Advanced packaging and testing, which determines whether leading-edge logic can actually be assembled into products, is heavily concentrated in a small number of facilities in East Asia. A fabrication plant built elsewhere does not localise a supply chain if the wafers it produces must cross an ocean twice to be packaged.
Industry capacity and trade statistics published by the Semiconductor Industry Association make the geography explicit. This is why industrial policy aimed only at fabrication capacity is incomplete, and why the more difficult, less announceable work involves materials, tooling and packaging. Those segments are smaller in revenue, which makes them less politically attractive to subsidise, and more concentrated, which makes them exactly where disruption would bite first.
